Shinwoong Park defended a Ph.D. dissertation and will join industry (January 2019)
Shinwoong Park (advisor: Raman) successfully defended his Ph.D. dissertation entitled “Reconfigurable Discrete-time Analog FIR (AFIR) Filters for Wideband Analog Signal Processing” on January 14, 2019. His dissertation research includes: 1) A 3.25GS/s 4th order Analog FIR filter design, 2) Implementation of FIR-based beamforming, and 3) Analysis and optimization of multi-section capacitive DACs (digital to analog converters). The AFIR filter achieves low power dissipation (<10 mW) and high-linearity (IIP3 >11 dBm), while providing a flexible frequency response tuning from DC to the Nyquist rate with 7-bit coefficient control codes. An FIR-based beamforming is demonstrated with the developed AFIR filters. The optimal structure for 10-bit resolution selected by the multi-section capacitive DAC method achieves at least 35% better performance in terms of speed, switching energy, and area compared with other options from existing methods. Shinwoong Park joined the MICS group after a BS degree from the University of Texas at Dallas (UTD), Richardson, Texas, and will join Qualcomm. We wish Shinwoong good luck in his industry career!
Brian Worek defended an MS thesis and plans to join industry (December 2018)
Brian Worek (advisor: Ampadu) successfully defended his MS thesis entitled “Enabling Approximate Storage through Lossy Media Data Compression” on December 13, 2018. Memory capacity, bandwidth, and energy all continue to present hurdles in the quest for efficient, high-speed computing. Fortunately, many memory-bound applications demonstrate inherent error resilience, a property that allows them to produce acceptable outputs even when data used in computation contain errors. Approximate storage exploits this property to improve memory energy consumption and performance through quality-energy scaling. His thesis reviews state of the art approximate storage techniques across circuits, architectures, and algorithms before presenting a lossy memory compression algorithm to enable approximate storage. Simulations with image data show the algorithm increases effective storage capacity by 15% and subsequently off-chip memory access energy costs by 15% for only 3% accuracy loss in an image classification application. The total energy overhead of the design simulated in hardware is less than 0.1%. Brian received a BS degree from Virginia Tech and will join Google as a hardware engineer. We wish Brian good luck in his industry career!
Shuang Cheng defended on MS thesis and plans to join industry (December 2018)
Shuang Cheng (advisor: Yi Yang) successfully defended her MS thesis entitled “Two-Phase Buck Converter Optimize by Echo State Network” on December 11, 2018. Echo State Network(ESN) is one of the main types of reservoir computing. The main benefit of ESN is that training is performed only at the readout stage and the reservoir is fixed. Connect ESN with two-phase buck converter can improve the efficiency and save more simulation time. The design changes the period of two-phase buck converter from 40µs to 100µs, compare the results with two-phase buck converter and ESN. Turns out the ESN save more time on simulation and can get a higher efficiency when the period of the switch is high. Shuang Cheng received a BS degree from Virginia Polytechnic Institute and State University and will join the industry. We wish Shuang good luck in her industry career!
MICS researcher Dr. Cindy-Yang Yi using brain-inspired methods to improve wireless communications
Researchers are always seeking more reliable and more efficient communications, for everything from televisions and cell phones to satellites and medical devices. One technique generating buzz for its high signal quality is a combination of multiple-input-multiple-output techniques with orthogonal frequency division multiplexing. Virginia Tech researchers Lingjia Liu and Yang (Cindy) Yi are using brain-inspired machine learning techniques to increase the energy efficiency of wireless receivers.
Their published findings, “Realizing Green Symbol Detection Via Reservoir Computing: An Energy-Efficiency Perspective,” received the Best Paper Award from the IEEE Transmission, Access, and Optical Systems Technical Committee. The paper is about the research work collaborating with researchers from the Information Directorate of the U.S. Air Force Research Laboratory — Jonathan Ashdown, John Matyjas, Michael Medley, and Bryant Wysocki. More details could be found at the vtnews website: https://vtnews.vt.edu/articles/2018/09/eng-ece-wireless-communications.html
Hughes joins the MICS IAP (September 2018)
Hughes Network Systems, LLC (HUGHES) the global leader in broadband satellite solutions and services, has joined the Industry Affiliates Program (IAP) of the MICS group. The primary purpose of the MICS IAP is to establish close collaboration, technology transfer, and student interactions between MICS and the Industry Affiliate partners. Under the IAP program, Hughes and MICS will pursue a long-term collaboration in microwave/mm-wave circuit design for satellite communications and other core areas of interest for Hughes, while advancing MICS research and student development. Hughes will also help guide the overall research direction of the MICS group through participation on the MICS Advisory Board.
Keyvan Ramezanpour (ECE Grad. Student) and Paul Ampadu won the Best Paper Award
Keyvan Ramezanpour (ECE Grad. Student) and Paul Ampadu won the Best Paper Award for their paper titled “Reconfigurable Clock Generator with Wide Frequency Range and Single-Cycle Phase and Frequency Switching” at the IEEE International System-on-Chip Conference (SOCC) that was held this week in Arlington, VA. In their paper, Keyvan and Paul introduced a multi-phase clock generator with reconfigurable phase spacing that allows adaptation to both phase and frequency with pico-second resolution. Congratulations to Paul and his student for this excellent scholarly recognition!
Brannon Kerrigan defended an MS thesis and plans to join industry (July 2018)
Brannon Kerrigan (advisor: Ha) successfully defended his MS thesis entitled “System Design of a High-Temperature Downhole Transceiver” on July 31, 2018. Decreasing reserves of natural resources drives the oil and gas industry to drill deeper to reach unexploited wells. Coupled with the demand for real-time data transmission, the need for high speed electronics capable of operating in harsher ambient environments is on the rise. His thesis presents a high data rate high-temperature transceiver design for a downhole communication system. The design utilizes the 2.4 – 2.5 GHz frequency band and supports high data rate full-duplex communications for up to 10 tools. Simulations show the transceiver design achieves a total uplink data rate of 170 Mbps and downlink data rate of 68 Mbps with BER of 10-6. The transceiver is intended to be prototyped using GaN-SiC and SiC devices for operation at ambient temperatures up to 250 ℃. Brannon received a BS degree from University of South Alabama and will join Lockheed Martin. We wish Brannon good luck in his industry career!
Alante Dancy defended an MS thesis and plans to join industry (July 2018)
Alante Dancy (advisor: Ha) successfully defended his MS thesis entitled “Energy Harvesting IC Design for an Electromagnetic Generator Based on the Split Capacitor Approach” on July 16, 2018. His thesis presents an IC aimed at harvesting vibrational energy from an electromagnetic generator (EMG). A single-stage topology, combining the rectifier and power stage, is utilized to reduce the power dissipation. The split capacitor circuit operatesin the boundary conduction mode (BCM), and the controller for the BCM algorithm is simplified and hence more power efficient over previously reported circuits. In addition to the BCM operation, synchronous rectification is adopted. The IC is designed in 130 nm BiCMOS technology and will be taped out by early September, 2018. Alante received a BS degree from Virginia Tech, and will join Northrop Grumman. We wish Alante good luck in his industry career!
Nate Turner defended an MS thesis and plans to join industry (July 2018)
Nate Turner (advisor: Ha) successfully defended his MS thesis entitled “High Temperature 2.37 GHz VCO” on July 5, 2018. Decreasing reserves of natural resources drives the oil and gas industry to drill deeper to reach unexploited wells. Coupled with the demand for real-time data transmission, the need for high speed electronics capable of operating in harsher ambient environment is on the rise. His thesis presents a high temperature voltage controlled oscillator (VCO) for a downhole communication system. The VCO was designed and prototyped using 0.25 μm GaN on SiC RF transistors with high junction temperature capability. Measurement results show that the proposed VCO can operate reliably under ambient temperature ranging from 25 °C to 225 °C and is tunable from 2.336GHz to 2.402 GHz. Nate received a BS degree from Virginia Tech, and will join Analog Devices Inc. We wish Nate good luck in his industry career!
Kanika Saini wins 3rd prize in the student paper competition at IEEE WAMICON (May 2018)
Kanika Saini (Advisor: Raman) won 3rd prize in the student paper competition held at 2018 IEEE Wireless and Microwave Technology Conference, Sand Key, FL, April 9th and 10th, for her paper titled “S-Band GaN LNA with OIP3 >50dBm using parallel independently biased gates”. As spectrum becomes more congested, it is becoming imperative for communications, radar, etc. T/R module amplifiers to be more linear to handle the more challenging interference environment. GaN technology is becoming more heavily used in such applications, and innovative approaches are needed to improve the linearity of GaN-based amplifier circuits. Kanika’s paper demonstrates a new, low-cost technique to improve the linearity of GaN low-noise amplifiers.
Joseph Chong defended a Ph.D. dissertation and joins industry (May 2018)
Joseph Chong (advisor: Ha) successfully defended his Ph.D. dissertation entitled “CMOS Receiver Circuit Design for High Speed Optical Communications” on May 4, 2018. His dissertation presents designs of a transimpedance amplifier for the data rate of 100 Gb/s and a clock-recovery circuit for the data rate of 40 Gb/s. The input resistance of the TIA amplifier is lowered through adoption of a diode-connected transistor at the input stage, and a test chip fabricated in 32 nm SOI CMOS technology achieves the bandwidth of 74 GHz to enable the data rate of 100 Gpbs. The clock recovery circuit employs a resonator-based frequency-doubling scheme. A test chip fabricated in 0.13 µm CMOS technology demonstrates successful recovery of the 40 GHz clock from the input with the data-rate of 40 Gb/s. Joseph joined the MICS group after an MS degree from National Taiwan University, and has joined Hughes Networks. We wish Joseph good luck in his industry career!
MICS hiked to Cascade Falls and enjoyed a cook out (April 2018)
MICS people enjoyed hiking along Little Stony Creek to Cascade Falls and cook out on April 28. Cascade Falls in Jefferson National Forest is one of the most beautiful waterfalls in Virginia and possibly on the entire East Coast. Several streams cascade on the way down while others fall the whole distance of the falls. MICS people cooked out at the state park after the hike. They enjoyed the beauty of sprouting trees and wild flowers of spring as well as foods, drinks, and, equally as important, the relaxed atmosphere at the end of the spring semester. MICS people work hard, but remember there is life outside of work!
Prof. Cindy Yang Yi Received the NSF CAREER Award
Prof. Cindy Yang Yi received the National Science Foundation (NSF) CAREER (Faculty Early Career Development Program) Award. The project is titled “CAREER: Enabling Brian-like Computing through 3D Neuromorphic Circuits and Systems,” with total amount of the award is $430K from NSF CISE/CCF Division. This project addresses design challenges in building a brain-like computing system through three-dimensional (3D) neuromorphic circuits, and using Through Silicon Via (TSV) - based 3D Integrated Circuits. Her proposed approach is expected to reduce the design area occupied by conventional capacitors, resulting in chip design-area reduction and improvement in chip performance and efficiency. A Computer Aided Design framework will be developed to optimize the use of these reconfigured TSVs. The resulting devices, circuits, and framework will be validated using silicon tape outs and emerging applications, e.g., advanced wireless broadband communications. In addition to enabling educational and outreach programs, the project provides industrial experience for underrepresented students, thus contributing to the development of workforce in this area of technology.
MICS Day Was Held Successfully on March 6, 2018
On March 6, 2018, the Center for Embedded Systems for Critical Applications (CESCA) and the Multifunctional Integrated Circuits and Systems group (MICS) jointly hosted their sixth annual research day with 12 guests from 11 different companies and agencies. Ninety-two people attended, including CESCA and MICS faculty and students. Students and faculty presented their research, while guests discussed the opportunities and research needs of their companies/agencies. Dr. Zhen Zhou of Intel Labs delivered the keynote speech. She is a senior research scientist with diverse industrial experiences including silicon photonic devices and opto-electrical digital link systems. The day concluded with tours of the CESCA and MICS labs. Companies that attended include Analog Devices Inc., Apple, ETRI (Korea), Hughes, Intel, Linear Tech, Macom, Nanosonic, Northrop Grumman, Nuvotronics, and Qualcomm.
Zhou with Intel is the Keynote speaker for MICS Day 2018 (February 2018)
MICS holds the 6th annual MICS Day on March 6, 2018. in which Dr. Zhen Zhou with Intel is the Keynote speaker. Dr. Zhou is currently a Senior Research Scientist at Intel Research Labs. Her industrial experiences are diverse including silicon photonic devices and opto-electrical digital link systems, three dimensional integrated circuits (3D ICs), Millimeter-Wave for wireless communications and automotive radars, and reconfigurable acoustic/MEMS resonators for wireless communication and digital clock distribution networks. She has coauthored more than 45 peer reviewed journal and conference papers, and filed 8 US patents. Dr. Zhou received a Ph.D. degree. from the University of Arizona, Tucson, in 2009.
Cindy Yi is awarded with a research project from NSF to Energy-Efficient Dynamic Spectrum Access Wireless Networks using Neuromorphic Computing (January 2018)
Prof. Cindy Yi (Co-PI), along with Prof. Lingjia Liu (PI), have been awarded an NSF grant for their project on “Collaborative Research: Enabling Spectrum and Energy-Efficient Dynamic Spectrum Access Wireless Networks using Neuromorphic Computing” in collaboration with Prof. Haibo He with University of Rhode Island. The goal of this project is to design DSA-enabled HetNets to enable short-range/local spectrum access to improve the spectrum and energy efficiency, and leverage neuromorphic computing architecture to efficiently solve the associated resource allocation problems with extremely high energy efficiency. Prof. Yi’s team will provide a neuromorphic computing prototype to efficiently solve the associated resource allocation problems. Prof. Yi plans to recruit a Ph.D. student dedicated to this research. This is a three-year award with a total amount of $750K, and VT’s share is $478K.
Cindy Yi is awarded with a research project from National Spectrum Consortium (NSC) to Apply Deep Learning to Dynamic Spectrum Access (DSA) Policy Optimization (January 2018)
Prof. Cindy Yi (Co-PI), along with Prof. Lingjia Liu (PI), have been awarded a National Spectrum Consortium (NSC) grant for their project on “Applying Deep Learning to Dynamic Spectrum Access (DSA) Policy Optimization” in collaboration with LGS Innovations as the prime contractor. The goal of this project is to apply the multi-player delayed feedback reservoir (DFR) to DSA Policy Optimization. Prof. Yi’s team will investigate the possibility of merging deep learning and DFR computing systems and fuel potentially disruptive capabilities in real-time data analysis, time-series predictions, and environmental perception for autonomous operations. This technology could also increase the functionality and performance of current and future computing systems by significantly decreasing power, size, and weight budgets, and by enabling various scientific research fields in DSA. This is a three-year award with a total amount of $15M, and VT’s share is $950K.