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Paul K. Ampadu

Professor
Paul Ampadu
Dept. of Electrical and Computer Engineering,
Virginia Tech
Blacksburg, VA 24061
USA

Research Interests:

  • Networks-on-Chip (NoCs), Systems-on-Chip (SoC), VLSI Digital Circuits, ICs and Systems


Research Topics:

  • Reliable and Trustworthy Circuits & Systems
  • Energy-Efficient Hybrid Photonic/Electronic NoCs, SoCs
  • Reliable, Energy-Efficient ICs for IoT
  • Secure/Reliable Embedded Circuits & Systems for Space Applications


Teaching Interests:

  • Advanced VLSI Design
  • Ultra-Low Power Reliable VLSI Circuits & Systems


Education:

  • Ph.D., Electrical and Computer Engineering, Cornell University, 2004
  • M.S., Electrical Engineering, University of Washington, 1999
  • B.S., Electrical Engineering, Tuskegee University, 1996

Recognition:

  • IEEE Circuits & Systems Board of Governors 2010-2013, 2013-2016
  • IEEE Senior Member
  • MIT Dr. Martin Luther King Visiting Prof
  • US Black Engineer of the Year Special Recognition


Publications in 2019:

  • Google Scholar Profile
  • List of recent publications
  • K. Ramezanpour, and P. Ampadu, “FIMA: Fault Intensity Map Analysis,” in 10th International Workshop, COSADE 2019, pp. 63-79, April 2019.
  • K. Ramezanpour, P. Ampadu, and W. Diehl, “A Statistical Fault Analysis Methodology for theAscon Authenticated Cipher,” in 2019 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), pp. 41-50, May 2019.
  • X. Liu, and P. Ampadu, “An Asymmetric Dual Output On-Chip DC-DC Converter for Dynamic Workloads,” in Proceedings of the 2019 on Great Lakes Symposium on VLSI, pp. 279-282, May 2019.
  • M. F. Reza, and P. Ampadu, “Approximate Communication Strategies for Energy-Efficient and High Performance NoC: Opportunities and Challenges,” in Proceedings of the 2019 on Great Lakes Symposium on VLSI, pp. 399-404, May 2019.
  • S. Ma, and P. Ampadu, “Approximate Memory with Approximate DCT,” in Proceedings of the 2019 on Great Lakes Symposium on VLSI, pp. 355-358, May 2019.
  • B. Worek, and P. Ampadu, “Enabling Approximate Storage through Lossy Media Data Compression,” in Proceedings of the 2019 on Great Lakes Symposium on VLSI, pp. 327-330, May 2019.
  • S. Ma, and P. Ampadu, “Optimal SAT-based Minimum Adder Synthesis of Linear Transformations,” in 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 335-338, Aug. 2019.
  • S. Ma, and P. Ampadu, “Self-decompressing FPGA Bitstreams,” in 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 247-250, Aug. 2019.
  • X. Liu, and P. Ampadu, “A Novel Single-Input-Multiple-Output DC/DC Converter for Distributed Power Management in Many-Core Systems,” in 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 794-797, Aug. 2019.
  • M. F. Reza, and P. Ampadu, “Energy-efficient and high-performance NoC architecture and mapping solution for deep neural networks,” in NOCS '19 Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, pp. 12-19, Oct. 2019.
  • K. Ramezanpour, and P. Ampadu, “Fault Intensity Map Analysis with Neural Network Key Distinguisher,” in ASHES'19 Proceedings of the 3rd ACM Workshop on Attacks and Solutions in Hardware Security Workshop, pp. 33-42, Nov. 2019.
  • K. Ramezanpour, and P. Ampadu, “RS-Mask: Random Space Masking as an Integrated Countermeasure against Power and Fault Analysis,” in 2020 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), Accepted (preprint).